Digital signal processing based project

• An automatic speaker recognition system
• Area time efficient scaling free CORDIC using generalized micro rotation selection
• Investigation in FIR filter to improve power efficiency and delay reduction
• Design and implementation of adaptive filtering algorithm for noise cancellation in speech signal on FPGA
• Fault-tolerant parallel filters based on error correction codes
• Practical energy aware link adaption for MIMO-OFDM system
• Maximize network topology lifetime using mobile node rotation
• A reconfigurable smart sensor interface for industrial WSN in IoT environment
• High throughput programmable systolic array FFT architecture and FPGA implementations
• A reconfigurable overlapping FFT/IFFT filter for ECG signal de-noising
• Subband adaptive filter for acoustic echo cancellation
• FPGA based partial reconfigurable FIR filter design
• Energy efficient spectrum access in cognitive radios
• Radio interface evolution towards 5G and enhance local area communications
• Power optimization of single precision floating point FET design using fully combinational circuits
• Adaptive variable step size in LMS algorithm using evolutionary programming
• Functional link adaptive filter for non linear acoustic echo cancellation
• Design and FPGA implementation of linear FIR low pass filter based on Kaiser window
• Low latency systolic Montgomery multiplier for finite field based on pentanomials
• A review on FPGA based pulse processing system
• An FPGA implementation of frequency output
• Analysis and implementation of low cost FPGA based digital pulse width modulators
• Achieving energy efficiency and reliability for data dissemination in duty cycle WSNs 
• Joint virtual MIMO and data gathering for wireless sensor network